Trace32 Modular Debugger Concept

The Trace32 systems have a modular structure. The concept protects the investment and is characterized by durability.
The debug controller is the centerpiece and is target architecture independent

Various debug controllers (Essential or Extend) are available to realize systems for debugging or those which can be extended with OffChip Trace.

The part dependent on the target architecture is the debug interface, which contains the various licenses as well as the hardware.

MutliCore / MultiChip Support

A debug controller can support MultiCore or / and MultiDevice. If the hardware of the debug interface allows it to accommodate different device families, these can also be operated in a network. The software supports SMP (symmetrical MultiCore) as well as AMP (asymmetrical MultiCore), including the definition of clusters.

Several debug controllers can be combined and allow the support of very complex structures.

Timing- and Logic- Analyzers can extend the Development Tool to a complete System.

see Timing- Logic- Protocol- Analyzer Tab's

DEBUG-E40
Debugging Controller Essential V4.0
with USB-3 Interface

A high speed Debugger solution for a economy Budget can create with this Controller.

The Debug-E40 Controller is designed with a 64Bit Cortex-A Core Device, 64 MByte System-Memory, flexible and fast FPGA Debugging Hardware and a USB-3 Interface to Host.

The Controller supports all JTAG, eJTAG, BDM, COP... Debugging Interface. The selection of the Debugging Family is done with the Debugging Interface-Cable.

The Controller has additional a PodBus Interface. On this Port, the Timing-Analyzer PowerProbe, the Trigger Probe, or the small Logic-Analyzer PowerIntergrator-I can connect.

The Debugging Controller can support Mutlicore Debugging (multiple Devices on the same JTAG-Port) or MultiDevice Debugging by connecting multiple of this Controller to one Unit.

The Debugging Controller can extend with 512MByte Trace Memory (for 4 Bit MIPI Trace Ports only, like Cortex-M, Mips, PIC32, ATMEL)

Not supported with this Controller are the other Trace-Ports (NEXUS; 8,16,32 Bit ETM ports; HSSTP-Techniques; AUD Ports etc.) Additional, the PowerIntergrator-II is not supported with this Controller. Please use the X50 Controller in this case.

POWER DEBUG-X50
High performance Debugging Controller eXtend V5.0
with 10/100/1000 MB Ethernet and USB-3 Interface

This Controller use a 64Bit Cortex-A 1.5 GHz dual Core Device, with 128MByte System-Memory. High Speed flexible FPGA Debugger Hardware. A 10/100/1000 Ethernet and a USB-3 Interface can use for connecting this Controller to the Host.

A High Speed Trace-Bus Interface can use for attached a Trace-Memory Module up to 8GByte Size.

The Controller supports all JTAG, eJTAG, BDM, COP... Debugging Interface. The selection of the Debugging Family is done with the Debugging Interface-Cable.

This Unit has additional a PodBus Interface. On this Port, the Timing-Analyzer PowerProbe, the Trigger Probe, or the small Logic-Analyzer PowerIntergrator-I can connect.

The High-Speed-Trace-Bus supports two Trace Modules. Vvery large High-Speed-Trace Memory with up to 8GByte Trace capability. Additional the large Logic-Analyzer Module PowerIntegrator-II can be attached.